A 4bit ripple counter and a bit synchronous counter are made using flipflops having propagation delay of 10 ns each. If the worst case delay in each ripple counter and the synchronous counter be R and S respectively, then
a. R = 10 ns, S = 40 ns b. R = 40 ns, S = 10 ns c. R = 10 ns, S = 30 ns d. R = 30 ns, S = 10 ns
A 4bit ripple counter and a bit synchronous counter are made using flipflops having propagation delay of 10 ns each. If the worst case delay in each ripple counter and the synchronous counter be R and S respectively, then
a. R = 10 ns, S = 40 ns b. R = 40 ns, S = 10 ns c. R = 10 ns, S = 30 ns d. R = 30 ns, S = 10 ns
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