FPGASIC Telegram 53
By default Vivado Lab setup JTAG clock speed at 15MHz. You can improve bitstream downloading time twice with help of this command:

set_property PARAM.FREQUENCY 30000000 [get_hw_targets]

preceding to doing open_hw_target.

The 30MHz is maximal frequency for MSSPE interface of FT2232H IC which used in Xilinx/Digilent USB-to-JTAG adapters.

#Xilinx #JTAG #FT2232H #Digilent #bitstream



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By default Vivado Lab setup JTAG clock speed at 15MHz. You can improve bitstream downloading time twice with help of this command:

set_property PARAM.FREQUENCY 30000000 [get_hw_targets]

preceding to doing open_hw_target.

The 30MHz is maximal frequency for MSSPE interface of FT2232H IC which used in Xilinx/Digilent USB-to-JTAG adapters.

#Xilinx #JTAG #FT2232H #Digilent #bitstream

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