C++ Russia — канал конференции

#доклады

Parallel Range Algorithms

ℹ️ О чем доклад: the talk abstracts several findings from std::execution papers (P2300 and adjacent papers) for accelerator parallelization. In the context of parallelization through senders and receivers, we can specify execution contexts which bind with certain hardware resources for asynchronous task scheduling.

This talk will also focus on P3179 on how std::execution is allowed to run on std::ranges, and on some recent proposals to modify std::execution (P3175 and others). 

🗣 Спикер: Abhilash Majumder — senior AI compiler engineer at NVIDIA, previously was a Compiler Engineer at Intel. Currently works on PTX backend enabling for NV GPUs, and used to work on SYCL/DPCPP compiler backend, Intel/LLVM for unified SYCL runtime across vendors (NV, AMD) and was engaged with PyTorch from Intel. Currently, he is part of NVIDIA C++ delegation for WG21 LEWG. 

Подробности и билеты

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www.tgoop.com/cpprussia_channel/685

1.18K viewsMar 12 at 09:53

#доклады

Parallel Range Algorithms

ℹ️ О чем доклад: the talk abstracts several findings from std::execution papers (P2300 and adjacent papers) for accelerator parallelization. In the context of parallelization through senders and receivers, we can specify execution contexts which bind with certain hardware resources for asynchronous task scheduling.

This talk will also focus on P3179 on how std::execution is allowed to run on std::ranges, and on some recent proposals to modify std::execution (P3175 and others). 

🗣 Спикер: Abhilash Majumder — senior AI compiler engineer at NVIDIA, previously was a Compiler Engineer at Intel. Currently works on PTX backend enabling for NV GPUs, and used to work on SYCL/DPCPP compiler backend, Intel/LLVM for unified SYCL runtime across vendors (NV, AMD) and was engaged with PyTorch from Intel. Currently, he is part of NVIDIA C++ delegation for WG21 LEWG. 

Подробности и билеты

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